Entasys Design, Inc. was founded in 2003 to provide EDA solutions for SoC design
Entasys has focused on the development of the early stage design planning solution which predicts and prevents the IC implementation problems even before RTL design stage. We are developing the intuitive design debugging solution for the gray area of the post-layout verification. The debugging solutions consist of timing ECO, pad ring LVS, and system connectivity verification tools.
- Company founded
- Founded a local subsidiary in US (Santa Clara, CA)
- Achieved the certification of R&D center from Korea Industrial Technology Association(KOITA)
- Achieved the certification of INNO-BIZ (Innovation of Business)